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       lli - directly execute programs from LLVM bitcode


       lli [options] [filename] [program args]


       lli  directly  executes  programs  in  LLVM bitcode format.  It takes a
       program in LLVM bitcode format and executes  it  using  a  just-in-time
       compiler,  if  one  is  available  for  the current architecture, or an
       interpreter.  lli takes all of  the  same  code  generator  options  as
       llc|llc, but they are only effective when lli is using the just-in-time

       If filename is not specified, then lli reads the LLVM bitcode  for  the
       program from standard input.

       The  optional  args  specified  on  the  command line are passed to the
       program as arguments.


          Override the argv[0] value passed into the executing program.

          If set to true, use the interpreter even if a just-in-time  compiler
          is available for this architecture. Defaults to false.

          Print a summary of command line options.

          Causes  lli  to load the plugin (shared object) named pluginfilename
          and use it for optimization.

          Print statistics from  the  code-generation  passes.  This  is  only
          meaningful for the just-in-time compiler, at present.

          Record  the  amount of time needed for each code-generation pass and
          print it to standard error.

          Print out the version of lli and exit without doing anything else.


       -mtriple=target triple
          Override the target triple specified in the input bitcode file  with
          the  specified  string.   This  may result in a crash if you pick an
          architecture which is not compatible with the current system.

          Specify the architecture for which to generate assembly,  overriding
          the target encoded in the bitcode file.  See the output of llc -help
          for a list of valid architectures.  By default this is inferred from
          the target triple or autodetected to the current architecture.

          Specify a specific chip in the current architecture to generate code
          for.  By default  this  is  inferred  from  the  target  triple  and
          autodetected  to  the current architecture.  For a list of available
          CPUs, use: llvm-as < /dev/null | llc -march=xyz -mcpu=help

          Override or control specific  attributes  of  the  target,  such  as
          whether  SIMD  operations  are  enabled  or not.  The default set of
          attributes is set by the current  CPU.   For  a  list  of  available
          attributes, use: llvm-as < /dev/null | llc -march=xyz -mattr=help


          Disable optimizations that may increase floating point precision.

          Enable optimizations that assume no Inf values.

          Enable optimizations that assume no NAN values.

          Causes  lli to enable optimizations that may decrease floating point

          Causes lli to generate software floating point library calls instead
          of equivalent hardware instructions.


          Choose the code model from:

              default: Target default code model
              small: Small code model
              kernel: Kernel code model
              medium: Medium code model
              large: Large code model

          Disable scheduling after register allocation.

          Disable fusing of spill code into instructions.

          Exception handling should be enabled in the just-in-time compiler.

          Coalesce copies (default=true).

       -nozero-initialized-in-bss  Don't  place  zero-initialized symbols into
       the BSS section.

          Instruction schedulers available (before register allocation):

              =default: Best scheduler for the target
              =none: No scheduling: breadth first sequencing
              =simple: Simple two pass scheduling: minimize critical path and maximize processor utilization
              =simple-noitin: Simple two pass scheduling: Same as simple except using generic latency
              =list-burr: Bottom-up register reduction list scheduling
              =list-tdrr: Top-down register reduction list scheduling
              =list-td: Top-down list scheduler -print-machineinstrs - Print generated machine code

          Register allocator to use (default=linearscan)

              =bigblock: Big-block register allocator
              =linearscan: linear scan register allocator =local -   local register allocator
              =simple: simple register allocator

          Choose relocation model from:

              =default: Target default relocation model
              =static: Non-relocatable code =pic -   Fully relocatable, position independent code
              =dynamic-no-pic: Relocatable external references, non-relocatable code

          Spiller to use (default=local)

              =simple: simple spiller
              =local: local spiller

          Choose style of code to emit from X86 backend:

              =att: Emit AT&T-style assembly
              =intel: Emit Intel-style assembly


       If lli fails to load the program, it will exit with an exit code of  1.
       Otherwise, it will return the exit code of the program it executes.




       Maintained by The LLVM Team (


       2003-2014, LLVM Project

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